דרושים בתחום FPGA / ASIC / VLSI

§ Define the architecture of complex, high performance VLSI products for Analytics & AI acceleration
§ Work closely with the SW/Algorithms team to achieve best overall system performance
§ Work closely with the VLSI implementation team to achieve cost effective solutions

B.Sc. or M.Sc. degree in Computer Engineering/Electrical Engineering
0-5 years in a semiconductor company as a DFT engineer

Chip design, Verilog and System Verilog
Verification, UVM methodologyATPG tools
Scan insertion tools
Gate-level simulations
Static timing analysis
Scripting (Perl/Tcl)
Familiarity with ATE

BSC in Electrical Engineering – from a well-known university
At least 2 years' experience as verification engineer
Knowledge in specman - an advantage
Knowledge in uvm – an advantage

BSc / MSc. in Electronics Engineering from a known university 
More than 3 years of experience in VLSI logic design in a known semiconductor company
Understanding and experience in a VLSI design flow: micro-architecture, logic design, verification, physical design, production tests and post-silicon

Sigmabit in Beer Sheva is looking for a FPGA Lead Engineer to lead and take part in the development of cutting edge products in the Communication and Wireless domains
As an experienced FPGA Lead Engineer, you will lead, define, design, integrate and implement FPGA and digital modules for wireless communication systems. You will lead and develop a robust, production-grade application while solving complex signal processing and system challenges. You will take part in the leadership of a multi-disciplinary team developing class-leading systems and products to deliver the best solutions to the company’s customers

B.Sc. in Electrical Engineering, Computer Engineering or equivalent
At least 3 years experience of FPGA development preferably for communication systems
Experience with implementation of signal processing functions (filters, resamplers, etc.)
Excellent design standards and strong debug skills
Strong knowledge of synthesis, place and route and timing compliance
Experience with VHDL/Verilog logic design principles along with timing, area and power implications
Experience with creation of complex designs including coding and integration of 3rd party IPs
Experience with verification methodologies, RTL and gate-level simulation
Experience with lab FPGA debugging methodologies such as ChipScope / SignalTap
Experience with lab debugging equipment such as oscilloscopes and logic analyzers
Leadership experience (formal / informal) – Advantage
Knowledge of wireless communications standards and protocols - Advantage
DC / DC and PDN design - Advantage
Basic FPGA design ( glue logic ) - Advantage
Experience with Xilinx - Advantage